1. Field of the Invention
The present invention relates generally to an operational amplifier, and more particularly, to an operational amplifier for use in portable communication equipment, for example.
2. Description of the Prior Art
As one example of conventional operational amplifiers, an operational amplifier having a construction disclosed in U.S. Pat. No. 5,291,149 is illustrated in FIG. 1. An operational amplifier 10 comprises a differential amplifying stage 1 and a current mirror stage 2. The differential amplifying stage 1 has first and second differential amplifier circuits 1a and 1b symmetrically disposed, and the current mirror stage 2 has first and second current mirror circuits 2a and 2b symmetrically disposed. A buffer circuit 3 is connected to a common output of the current mirror circuits 2a and 2b.
The first differential amplifier circuit 1a is constituted by a pair of NPN transistors Q1 and Q2, while the second differential amplifier circuit 1b is constituted by a pair of PNP transistors Q4 and Q5.
The first current mirror circuit 2a is constituted by three PNP transistors Q7, Q8 and Q9, while the second current mirror circuit 2b is constituted by three NPN transistors Q10, Q11, and Q12.
The transistors Q1 and Q4 in the first and second differential amplifier circuits 1a and 1b, respectively, have their bases commonly connected to a positive phase input terminal IN.sub.1, and the other transistors Q2 and Q5, respectively, have their bases commonly connected to a negative phase input terminal IN.sub.2. In addition, the collector of the transistor Q1 forms an output terminal of the first differential amplifier circuit 1a and is connected to an input portion of the first current mirror circuit 2a. The transistor Q2 has its collector connected to a positive power supply terminal. The transistors Q1 and Q2, respectively, have their emitters commonly connected to a first constant current circuit 4a. A collector of the transistor Q4 forms an output terminal of the second differential amplifier circuit 1b and is connected to an input portion of the second current mirror circuit 2b. The collector of the transistor Q5 is connected to a negative power supply terminal. The transistors Q4 and Q5, respectively, have their emitters commonly connected to a second constant current circuit 4b. The first and second constant current circuits 4a and 4b can each be constituted by junction type FETs (Field Effect Transistors), for example.
The respective collectors of the transistors Q9 and Q12 form output terminals of the first and second current mirror circuits 2a and 2b and are commonly connected to an input portion of the buffer circuit 3. In addition, the collector of the transistor Q9 is connected to the positive power supply terminal through a phase compensating capacitor C1, and the collector of the transistor Q12 is connected to the negative power supply terminal through a phase compensating capacitor C2. Further, the buffer circuit 3 is constituted by an emitter follower circuit, for example, and an input impedance existing inside the buffer circuit 3 functions as a load impedance Z.sub.0 on the first and second current mirror circuits 2a and 2b.
In the operational amplifier 10, operating currents of the first and second current mirror circuits 2a and 2b are determined by collector currents of the transistors Q1 and Q4 in the first and second differential amplifier circuits 1a and 1b. Consequently, a current corresponding to an input signal voltage flows in the load impedance Z.sub.0. Accordingly, stable output characteristics are obtained without being affected by the variation in power supply voltage and the change in temperature, and the operational amplifier 10 can be operated at a relatively low current.
In order to further cope with lower current consumption, however, it is necessary that the operational amplifier 10 be capable of operating at a lower current. An operational amplifier 20 shown in FIG. 2 has been proposed to meet such a demand. In the operational amplifier 20, a diamond-type buffer circuit 13 comprising transistors Q21, Q22, Q25 and Q26 is constructed, and constant current circuits 5a and 5b are respectively used as current sources of the transistors Q21 and Q22.
However, even lower current consumption is necessary because portable communication equipment and the like have been rapidly miniaturized in recent years. Consequently, an operational amplifier which can be operated at a very small current is greatly needed. If the above described operational amplifier 20 is operated at a very small current, however, the response characteristics of an output waveform to an input waveform are degraded. Particularly, the slew rate is low in a rise portion of the waveform, so that the rise time is long, while the settling time of the waveform is long in a fall portion of the waveform, causing waveform distortion. If the operational amplifier 20 being low in waveform response characteristics is used to perform signal processing, the signal processing cannot be performed at high speed, thereby making it difficult to improve communication performance.
On the other hand, if in the operational amplifier, a signal passes through an amplifier circuit, phase delay generally occurs between an input signal and an output signal. The phase delay may, in some cases, reach at least 180.degree. in a high frequency region. If such an operational amplifier is used in a negative feedback circuit, positive feedback occurs, causing oscillation at a frequency at which the gain is not less than 0 dB and the phase delay is 180.degree.. If the phase delay does not reach 180.degree. but is close to 180.degree., it is considered that the phase delay reaches 180.degree. due to the variation in the operational amplifier, the temperature characteristics, and a capacitor, a resistor and the like constructed outside the operational amplifier. Consequently, a large phase margin as much as a phase delay=180.degree. must be ensured so as to enhance the stability. The phase margin must generally be approximately 40.degree..
In the above described operational amplifier 10, therefore, the above described phase compensating capacitors C1 and C2 are connected to the output side of the current mirror stage 2. Specifically, the open loop gain of the operational amplifier 10 is restrained by the capacitors C1 and C2, to make phase compensation such that the gain at a frequency at which the phase delay in a high frequency region is 180.degree. is not more than 0 dB. As a result, the above described phase margin for preventing oscillation is set to a certain degree of magnitude.
Furthermore, as shown in FIG. 3, an operational amplifier 30 in which a phase compensating circuit comprising a series circuit of a capacitor C3 and a resistor R1 is connected between an input and an output of a buffer circuit 3 is also proposed.
However, lower current consumption and higher frequency operation of portable communication equipment and the like is needed because of recent developments in communication equipment. Lower current consumption and wider bandwidth are desperately needed with respect to an operational amplifier used for the portable communication equipment. In the above described conventional operational amplifiers 10, 20 and 30, however, the product of gain and bandwidth is decreased if the operational amplifiers are operated at a low current, while the phase margin is insufficient if wider bandwidth is achieved, thereby increasing the danger of oscillation. Specifically, if an attempt to realize both lower current consumption and wider bandwidth is made, it is very difficult to realize a stable operational amplifier.